1/10 may 2002 stp35nf10 STB35NF10 n-channel 100v - 0.030 w - 40a to-220 / d 2 pak low gate charge stripfet? power mosfet (1) i sd 35a, di/dt 300a/s, v dd v (br)dss , t j t jmax. (2) starting t j = 25c, i d = 20a, v dd = 80v n typical r ds (on) = 0.030 w n exceptional dv/dt capability n 100% avalanche tested n application oriented characterization description this power mosfet series realized with stmicro- electronics unique stripfet process has specifical- ly been designed to minimize input capacitance and gate charge. it is therefore suitable as primary switch in advanced high-efficiency isolated dc-dc converters for telecom and computer application. it is also intended for any application with low gate charge drive requirements. applications n high-efficiency dc-dc converters n ups and motor control absolute maximum ratings ( l ) pulse width limited by safe operating area type v dss r ds(on) i d stp35nf10 STB35NF10 100 v 100 v < 0.035 w < 0.035 w 40 a 40 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 100 v v dgr drain-gate voltage (r gs = 20 k w ) 100 v v gs gate- source voltage 20 v i d drain current (continuous) at t c = 25c 40 a i d drain current (continuous) at t c = 100c 28 a i dm ( l ) drain current (pulsed) 160 a p tot total dissipation at t c = 25c 11 5 w derating factor 0.77 w/c dv/dt (1) peak diode recovery voltage slope 13 v/ns e as (2) single pulse avalanche energy 300 mj t stg storage temperature C 55 to 175 c t j operating junction temperature to-220 1 2 3 1 3 d 2 pak internal schematic diagram
stp35nf10 - STB35NF10 2/10 thermal data electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-case thermal resistance junction-case max 1.30 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 100 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 234v r ds(on) static drain-source on resistance v gs = 10v, i d = 17.5 a 0.030 0.035 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds = 15v , i d = 17.5 a 20 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 1550 pf c oss output capacitance 220 pf c rss reverse transfer capacitance 95 pf
3/10 stp35nf10 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 50v, i d = 17.5 a r g = 4.7 w v gs = 10v (see test circuit, figure 3) 17 ns t r rise time 60 ns q g total gate charge v dd = 80v, i d =35a,v gs = 10v 55 nc q gs gate-source charge 12 nc q gd gate-drain charge 20 nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off-delay time fall time v dd = 50v, i d = 17.5 a, r g =4.7 w, v gs = 10v (see test circuit, figure 3) 60 15 ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 40 a i sdm (2) source-drain current (pulsed) 160 a v sd (1) forward on voltage i sd = 35 a, v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 35 a, di/dt = 100a/s, v dd = 25v, t j = 150c (see test circuit, figure 5) 160 720 9 ns nc a thermal impedence safe operating area
stp35nf10 - STB35NF10 4/10 capacitance variations gate charge vs gate-source voltage transconductance static drain-source on resistance output characteristics transfer characteristics
5/10 stp35nf10 source-drain diode forward characteristics normalized gate thereshold voltage vs temp. normalized on resistance vs temperature
stp35nf10 - STB35NF10 6/10 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/10 stp35nf10 dim. mm inch min. typ. max. min. typ. max. a 4.40 4.60 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 d1 1.27 0.050 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.4 2.7 0.094 0.106 h2 10.0 10.40 0.393 0.409 l2 16.4 0.645 l4 13.0 14.0 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.2 6.6 0.244 0.260 l9 3.5 3.93 0.137 0.154 dia. 3.75 3.85 0.147 0.151 l6 a c d e d1 f g l7 l2 dia. f1 l5 l4 h2 l9 f2 g1 to-220 mechanical data p011c
stp35nf10 - STB35NF10 8/10 1 dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.7 0.93 0.027 0.036 b2 1.14 1.7 0.044 0.067 c 0.45 0.6 0.017 0.023 c2 1.23 1.36 0.048 0.053 d 8.95 9.35 0.352 0.368 d1 8 0.315 e 10 10.4 0.393 e1 8.5 0.334 g 4.88 5.28 0.192 0.208 l 15 15.85 0.590 0.625 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.068 m 2.4 3.2 0.094 0.126 r 0.4 0.015 v2 0 o8o d 2 pak mechanical data 3
9/10 stp35nf10 tape and reel shipment (suffix t4)* tube shipment (no suffix)* d 2 pak footprint * on sales type dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0795 g 24.4 26.4 0.960 1.039 n 100 3.937 t 30.4 1.197 base qty bulk qty 1000 1000 reel mechanical data dim. mm inch min. max. min. max. a0 10.5 10.7 0.413 0.421 b0 15.7 15.9 0.618 0.626 d 1.5 1.6 0.059 0.063 d1 1.59 1.61 0.062 0.063 e 1.65 1.85 0.065 0.073 f 11.4 11.6 0.449 0.456 k0 4.8 5.0 0.189 0.197 p0 3.9 4.1 0.153 0.161 p1 11.9 12.1 0.468 0.476 p2 1.9 2.1 0.075 0.082 r 50 1.574 t 0.25 0.35 0.0098 0.0137 w 23.7 24.3 0.933 0.956 tape mechanical data
stp35nf10 - STB35NF10 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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